Varactors form a class of tunable semiconductor capacitors typically derived from pn-junctions, where the pn-junction is operated in a reverse bias state. The varactor's capacitance can be varied by adjusting the reverse bias voltage. Hence, varactors can be characterized by a CV tuning curve. Varactors are especially useful in oscillation circuits, especially voltage-controlled oscillators (VCOs), where the varactor's tunability is used to tune the oscillation frequency of the circuit. Varactors thus find use in cellular or mobile phones, PDAs, televisions, radios, computers, active filters, and wherever a first signal is synchronized to a second signal.
Varactors that include an ion-implanted hyperabrupt junction are known and are referred to in the art as “hyperabrupt junction varactors”. See, for example, U.S. Pat. No. 4,226,648 to Goodwin, et al., U.S. Pat. No. 4,827,319 to Pavlidis, et al, U.S. Pat. No. 5,557,140 to Nguyen, et al. and U.S. Pat. No. 6,521,506 to Coolbaugh, et al. The term “hyperabrupt” is used to denote the profile of the pn junction. Hyperabrupt junction varactors have a doping profile that changes in a controlled non-linear way with density of the dopants increasing towards the junction and abruptly dropping to zero at the junction.
Hyperabrupt junction varactors have a higher tuning range than pn-diode varactors, Schottky diode varactors and metal oxide semiconductor (MOS) diode varactors. Moreover, hyperabrupt junction varactors have an almost linear CV characteristic along with a high quality factor Q. These figures of merit, i.e., tunability, high Q, and linear CV, make the hyperabrupt junction varactor the device of choice for designers of VCOs.
In order to implement a hyperabrupt junction varactor, which is independent of critical CMOS and BiCMOS processes, the prior art technique requires that at least two unique critical implant mask levels be implemented. For example, one implant mask level is needed to form the subcollector and/or the n-type implant for the hyperabrupt junction varactor and another implant mask level is needed to implement the p+ implant and/or the hyperabrupt implant to form the anode device.
In order for one to make a one mask level hyperabrupt junction varactor, one would need to depend/implement the p+ implant from a standard pFET source/drain implant or similar p+ implants from the bipolar emitter. Such a process would, however, restrict the modularity of the hyperabrupt varactor process since the n-type implant used to form the hyperabrupt junction would need to be tailored to the specific p+ source/drain or emitter implant technologies. In addition, using the p+ source/drain implant or the emitter implant will cause multiple issues in the future since it is common practice to adjust the p+ implant to tune specific devices, e.g., pFETs, p+ polySi resistors, p+ diffusion resistors and bipolar transistors back to specification. Any minor adjustments to the energy or the dose can cause a large shift in the hyperabrupt junction varactor using it.
FIG. 1 shows a cross sectional view of a typical prior art semiconductor structure 10A that includes a one cathode contact and a hyperabrupt junction varactor. The hyperabrupt junction varactor of the prior art structure was fabricated using at least two critical masking levels. The structure 10A shown in FIG. 1 includes a Si-containing substrate 12 that comprises a buried subcollector/cathode 14, a collector 16, trench isolation regions 18, reach-through implant region 20 and hyperabrupt dopant region 24. The reach-through implant region 20 is in contact with the subcollector/cathode 14 at one point in this prior art structure. The buried subcollector 14, collector 16, and reach-through implant region 20 are comprised of the same conductivity type dopant (p-type or n-type, with n-type being preferred). The dopant concentration within regions 14, 16 and 20, however, is different. For example, the buried subcollector 14 and the reach-through implant 20 are more heavily doped than the collector 16. Atop the substrate 12, there is shown a silicide region 32 which is in contact with the reach-through implant region 20. Dielectric film 30 is also shown atop the substrate 12 and it is located atop the trench isolation regions 18. A base region 25 comprising, for example, doped polySi, is located atop the substrate 12 as well. The base region 25 comprises a monocrystalline portion 26 over the Si-containing substrate 12, and a polycrystalline portion 27 over the trench isolation regions 18 and dielectric film 30. A silicide region 34 is also located atop the base region 25.
In addition to the one cathode contact design described above, it is also possible to form a two-cathode contact structure utilizing prior art methods. The two-cathode contact containing structure 10B is shown in FIG. 2. The reference numerals used in FIG. 2 are the same as those used in FIG. 1 therefore the elements depicted in the two-cathode design shown in FIG. 2 are the same as that described above in regard to FIG. 1. The hyperabrupt junction varactor of the prior art structure shown in FIG. 2 was also made using at least two critical masking levels.
In both prior art structures mentioned above, two critical masking levels are required to form the hyperabrupt dopant region. In the semiconductor industry, there is an ongoing complaint that prior art hyperabrupt junction varactors require the two additional implant mask levels to form the same. Moreover, there is a need to find a solution that would enable the use of a one masking level device, which avoids the problems mentioned above.